• DocumentCode
    1729460
  • Title

    Burst and latency requirements drive EDO and BEDO DRAM standards

  • Author

    Mormann, A.

  • Author_Institution
    Micron Technol. Inc., Santa Clara, CA, USA
  • fYear
    1996
  • Firstpage
    356
  • Lastpage
    359
  • Abstract
    The standard "commodity" DRAM functionality has recently evolved from fast page mode (FPM) into extended data out (EDO) and burst extended data out (BEDO). These functional changes are the response to the need for improved burst rates with low lead-off latencies. EDO and BEDO meet these requirements and retain the same low manufacturing cost.
  • Keywords
    DRAM chips; standards; BEDO; DRAM standards; EDO; burst extended data out; burst requirements; extended data out; fast page mode; latency requirements; Computer architecture; Costs; Delay; Error correction codes; Frequency; High performance computing; Lead; Manufacturing; Microprocessors; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon '96. 'Technologies for the Information Superhighway' Digest of Papers
  • Conference_Location
    Santa Clara, CA, USA
  • ISSN
    1063-6390
  • Print_ISBN
    0-8186-7414-8
  • Type

    conf

  • DOI
    10.1109/CMPCON.1996.501795
  • Filename
    501795
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1729460