Title :
TCAD optimization of a dual N/P-LDMOS transistor
Author :
Poli, S. ; Reggiani, S. ; Sharma, R. Kr ; Baccarani, G. ; Gnani, E. ; Gnudi, A. ; Denison, M.
Author_Institution :
ARCES & DEIS, Univ. of Bologna Bologna, Bologna, Italy
Abstract :
The physical behavior of the dual N/P-LDMOS device concept is reviewed and analyzed. Through a proper optimization, a scalable device with good RSP vs. VBD performance in a range of 20-150 V is identified. Further, the current expansion at high gate and drain biases is fully explained by means of TCAD simulations and nicely exploited for the design of an LDO linear voltage regulator with excellent performance in terms of both drop-out voltage and maximum load current.
Keywords :
MOSFET; circuit optimisation; technology CAD (electronics); LDO linear voltage regulator; TCAD optimization; TCAD simulations; drain bias; drop-out voltage; dual N-P-LDMOS transistor; lateral double-diffused DMOS transistor; maximum load current; scalable device; voltage 20 V to 150 V; Fingers; Logic gates; Performance evaluation; Regulators; Three dimensional displays; Transistors; Voltage control;
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2011 Proceedings of the European
Conference_Location :
Helsinki
Print_ISBN :
978-1-4577-0707-0
Electronic_ISBN :
1930-8876
DOI :
10.1109/ESSDERC.2011.6044188
