DocumentCode :
1730339
Title :
Time-Domain Pre-Emphasis Techniques for Equalization of Multiple-Valued Data
Author :
Yuminaka, Yasushi ; Takahashi, Yasunori
Author_Institution :
Grad. Sch. of Eng., Dept. of Electron. Eng., Gunma Univ., Kiryu
fYear :
2008
Firstpage :
20
Lastpage :
25
Abstract :
This paper presents a new equalization technique based on a pulse-width modulation (PWM) pre-emphasis method which utilizes time-domain information processing to increase the data rate for a given bandwidth of VLSI interconnection. The pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower voltage headroom. We discuss new time-domain pre-emphasis techniques especially for multiple-valued data transmission in order to achieve high-speed data transmission in VLSI systems.
Keywords :
CMOS integrated circuits; VLSI; data communication; pulse width modulation; VLSI interconnection; high-speed data transmission; multiple-valued data transmission; pulse-width modulation preemphasis method; time-domain preemphasis techniques; Bandwidth; CMOS technology; Data communication; Finite impulse response filter; Information processing; Pulse width modulation; Space vector pulse width modulation; Time domain analysis; Timing; Very large scale integration; Equalizer; High-speed interface; Multi-valued logic; Pre-emphasis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multiple Valued Logic, 2008. ISMVL 2008. 38th International Symposium on
Conference_Location :
Dallas, TX
ISSN :
0195-623X
Print_ISBN :
978-0-7695-3155-7
Type :
conf
DOI :
10.1109/ISMVL.2008.40
Filename :
4539396
Link To Document :
بازگشت