• DocumentCode
    1730615
  • Title

    A novel and efficient timing-driven global router for standard cell layout design based on critical network concept

  • Author

    Jing, Tong ; Hong, Xian-Long ; Bao, Hai-Yun ; Cai, Yi-Ci ; Xu, Jing-Yu ; Gu, Jun

  • Author_Institution
    Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
  • Volume
    1
  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Abstract
    This paper presents a novel timing-driven global routing algorithm for standard cell (SC) layout design based on a critical network concept. The essence of this algorithm is different from that of the typical existing methods, such as the nets-based method and the critical-path-based method. The timing optimization strategy presented in this algorithm is more optimal than the typical existing ones, which makes it possible to reduce the delay in an overall survey. This algorithm has been implemented and tested by MCNC benchmark circuits in this paper. We compared the experimental results between our algorithm and the existing ones. The experimental results show that this algorithm is able to control the delay of the circuit efficiently, and causes little negative effect on other optimizing objectives.
  • Keywords
    VLSI; application specific integrated circuits; circuit layout CAD; circuit optimisation; integrated circuit layout; network routing; timing; MCNC benchmark circuits; VLSI; critical network concept; standard cell layout design; timing optimization strategy; timing-driven global routing algorithm; Algorithm design and analysis; Benchmark testing; Circuit testing; Computer science; Delay effects; Electronic mail; Integrated circuit interconnections; Routing; Timing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
  • Print_ISBN
    0-7803-7448-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2002.1009803
  • Filename
    1009803