DocumentCode :
1730767
Title :
A device array for efficient bias-temperature instability measurements
Author :
Sato, Takashi ; Kozaki, Tadamichi ; Uezono, Takumi ; Tsutsui, Hiroshi ; Ochi, Hiroyuki
Author_Institution :
Dept. of Commun. & Comput. Eng., Kyoto Univ., Kyoto, Japan
fYear :
2011
Firstpage :
143
Lastpage :
146
Abstract :
A device array suitable for efficiently collecting statistical information on bias-temperature instability (BTI) parameters of a large number of transistors is presented. The proposed array structure substantially shortens measurement time of threshold voltage shifts under BTI conditions by parallelizing stress periods of multiple devices while maintaining 0.2mV precision. An implementation of BTI array consisting of 128 devices successfully validates stress-pipelining concept. Log-normal distributions of time exponents are experimentally observed.
Keywords :
log normal distribution; stability; statistical analysis; temperature measurement; transistors; BTI array; device array; efficient bias-temperature instability measurements; log-normal distributions; stress-pipelining concept; transistors; voltage 0.2 mV; voltage shifts; Arrays; Semiconductor device measurement; Stress; Stress measurement; Threshold voltage; Time measurement; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2011 Proceedings of the European
Conference_Location :
Helsinki
ISSN :
1930-8876
Print_ISBN :
978-1-4577-0707-0
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2011.6044214
Filename :
6044214
Link To Document :
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