DocumentCode :
1730790
Title :
Challenges in TCAD simulations of tunneling field effect transistors
Author :
Kampen, C. ; Burenkov, A. ; Lorenz, J.
Author_Institution :
Fraunhofer Inst. for Integrated Syst. & Device Technol. IISB, Erlangen, Germany
fYear :
2011
Firstpage :
139
Lastpage :
142
Abstract :
In this paper we present an extensive comparison of tunneling device simulations versus experimental results. Different tunneling models were used to simulate long channel silicon on insulator tunneling field effect transistors. The results were compared to experimental results, which were taken from the literature. A calibrated parameter set of the dynamic NonLocal-Tunneling model is presented, which qualitatively reproduces the experimental results at different electrostatic potential conditions and physical gate lengths.
Keywords :
field effect transistors; silicon; technology CAD (electronics); tunnel transistors; TCAD simulations; dynamic nonlocal-tunneling model; electrostatic potential conditions; insulator tunneling field effect transistors; long channel silicon simulation; physical gate lengths; tunneling device simulations; Logic gates; Phonons; Semiconductor process modeling; Silicon on insulator technology; Simulation; Transistors; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2011 Proceedings of the European
Conference_Location :
Helsinki
ISSN :
1930-8876
Print_ISBN :
978-1-4577-0707-0
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2011.6044215
Filename :
6044215
Link To Document :
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