Title :
Methods to improve machine-model ESD robustness of NMOS devices in fully-salicided CMOS technology
Author :
Hsu, Hsin-Chyh ; Chen, Chi-Ming ; Ker, Ming-Dou
Author_Institution :
Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
Abstract :
NMOS with dummy-gate structure is proposed to significantly improve machine-model (MM) electrostatic discharge (ESD) robustness in a fully-salicided CMOS technology. By using this structure, the ESD current is discharged far away from the salicided surface channel of NMOS, therefore NMOS can sustain a much higher ESD level, especially under the machine-model ESD stress.
Keywords :
MOSFET; electrostatic discharge; semiconductor device models; ESD robustness machine-model; MOSFET; NMOS devices; electrostatic discharge; fully-salicided CMOS technology; semiconductor device models; CMOS process; CMOS technology; Circuits; Degradation; Electrostatic discharge; MOS devices; MOSFETs; Protection; Robustness; Stress;
Conference_Titel :
VLSI Technology, 2005. (VLSI-TSA-Tech). 2005 IEEE VLSI-TSA International Symposium on
Print_ISBN :
0-7803-9058-X
DOI :
10.1109/VTSA.2005.1497064
