Title :
Multiple Valued Logic Using 3-State Quantum Dot Gate FETs
Author :
Chandy, John A. ; Jain, Faquir C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Connecticut, Storrs, CT
Abstract :
This paper presents fundamental logic structures designed using novel quantum dot gate FETs with three-state characteristics. This three-state FET manifests itself as a transistor with a stable "intermediate" state, where the drain current remains constant over a range of input gate voltages due to a change in the threshold voltage over this range. We have developed a simplified circuit model that accounts for this intermediate state. Using this model, we have designed rudimentary logic circuits for use in multiple-valued logic circuits.
Keywords :
field effect transistor circuits; logic design; multivalued logic circuits; quantum dots; quantum gates; 3-state quantum dot gate FET; circuit model; intermediate state; multiple valued logic circuits; rudimentary logic circuits; CMOS logic circuits; FETs; Insulation; Logic circuits; Logic design; Multivalued logic; Quantum computing; Quantum dots; Threshold voltage; Tunneling; multiple-valued logic; quantum dots;
Conference_Titel :
Multiple Valued Logic, 2008. ISMVL 2008. 38th International Symposium on
Conference_Location :
Dallas, TX
Print_ISBN :
978-0-7695-3155-7
DOI :
10.1109/ISMVL.2008.34
