DocumentCode
1730984
Title
Design and integration of strained SiGe/Si hetero-structure CMOS transistors
Author
Huang, Chien-Chao ; Yeo, Yee-Chia ; Chen, Shih-Chang ; Yang, Fu-Liang ; Chi, Min-Hwa
Author_Institution
Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan
fYear
2005
Firstpage
23
Lastpage
24
Abstract
We report the integration of a strained-Si0.75Ge0.25/Si hetero-structure channel in a manufacturable CMOS process using selective epitaxy. The enhancement of drive current is demonstrated for pMOSFETs. The concerns on device design for strained SiGe/Si hetero-structure transistors are discussed, particularly the dependence of hole mobility enhancement.
Keywords
Ge-Si alloys; MOSFET; epitaxial growth; hole mobility; CMOS transistor strained hetero-structure; Si0.75Ge0.25-Si; drive current enhancement; hole mobility enhancement; manufacturable CMOS process; pMOSFET; selective epitaxy; CMOS process; CMOS technology; Epitaxial growth; Fabrication; Germanium silicon alloys; Implants; MOSFETs; Semiconductor device manufacture; Silicon germanium; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2005. (VLSI-TSA-Tech). 2005 IEEE VLSI-TSA International Symposium on
ISSN
1930-8868
Print_ISBN
0-7803-9058-X
Type
conf
DOI
10.1109/VTSA.2005.1497066
Filename
1497066
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