DocumentCode :
1731107
Title :
The excellent scalability of the RCAT (recess-channel-array-transistor) technology for sub-70nm DRAM feature size and beyond
Author :
Kim, Jin Young ; Woo, D.S. ; Oh, H.J. ; Kim, H.J. ; Kim, S.E. ; Park, Bong Joo ; Kwon, J.M. ; Shim, M.S. ; Ha, G.W. ; Song, J.W. ; Kang, N.J. ; Park, J.M. ; Hwang, H.K. ; Song, S.S. ; Hwang, Yoon Sung ; Kim, Dong In ; Kim, D.H. ; Huh, M. ; Han, D.H. ; Lee
Author_Institution :
Adv. Technol. Dev. Semicond. R&D Div., Samsung Electron. Co., Yongin, South Korea
fYear :
2005
Firstpage :
33
Lastpage :
34
Abstract :
The technology innovation for extending the RCAT structure to the sub-70nm DRAM is presented. The new technology overcomes the problems induced by shrinkage of the RCAT structure and meets the requirements for the next generation DRAMs, such as high speed and low power performance. The technology roadmap down to the 50nm DRAM feature size of the RCAT development is presented.
Keywords :
DRAM chips; field effect transistors; 70 nm; DRAM; RCAT scalability; RCAT technology; dynamic random access memory; recess-channel-array-transistor technology; Content addressable storage; DH-HEMTs; Delay effects; Doping; Intrusion detection; Lithography; Random access memory; Scalability; Technological innovation; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2005. (VLSI-TSA-Tech). 2005 IEEE VLSI-TSA International Symposium on
ISSN :
1930-8868
Print_ISBN :
0-7803-9058-X
Type :
conf
DOI :
10.1109/VTSA.2005.1497071
Filename :
1497071
Link To Document :
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