DocumentCode
1731586
Title
Floating gate memories: Moore´s law continues
Author
Lai, Stefan K.
Author_Institution
Intel Corp., Santa Clara, CA, USA
fYear
2005
Firstpage
74
Lastpage
77
Abstract
Floating gate memories are the mainstream of flash non volatile memories and have followed Moore´s law scaling through multiple technology generations, representing one of the fastest growing memory segments. Looking forward, maintaining the pace of Moore´s law scaling is increasingly difficult. The challenging areas include electrical, physical and reliability characteristics of the memory cell. However, through innovative device design, introduction of new materials and memory error management, we anticipate that floating gate flash memories are economically viable beyond 45 nm to 32 nm. In this paper, the physical and electrical scaling challenges as well as possible solutions are discussed. Further, more complex, structural innovations may be possible to maintain further scaling.
Keywords
flash memories; random-access storage; Moore law; electrical characteristic; flash nonvolatile memory; floating gate flash memory; floating gate memory; memory cell; memory error management; physical characteristic; reliability characteristic; Capacitance; Dielectrics; Educational institutions; Lithography; Maintenance; Memory management; Moore´s Law; Nonvolatile memory; Thickness control; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2005. (VLSI-TSA-Tech). 2005 IEEE VLSI-TSA International Symposium on
ISSN
1930-8868
Print_ISBN
0-7803-9058-X
Type
conf
DOI
10.1109/VTSA.2005.1497087
Filename
1497087
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