DocumentCode :
1731776
Title :
Sequence-pair based placement with boundary constraints
Author :
Lee, Chih-Hung ; Hsieh, Yi-Lin ; Lee, Hui-Chun ; Hsieh, Tsai-Ming
Author_Institution :
Dept. of Electron. Eng., Chung Yuan Christian Univ., Chung-li, Taiwan
Volume :
1
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Abstract :
Floorplanning is an important stage in the VLSI physical design. In this paper, we present a new algorithm for handling the module placement problem with the consideration of boundary constraints based on the representation of sequence-pair. We integrate the boundary constraints checking rules into the simulated annealing based sequence-pair module placement algorithm such that we can keep the feasibility of the solution in each pertubation. Experimental results on MCNC benchmarks show that our approach is quite promising.
Keywords :
VLSI; circuit layout CAD; integrated circuit layout; simulated annealing; VLSI physical design; boundary constraints; checking rule; floorplanning method; sequence-pair module placement algorithm; simulated annealing; Constraint theory; Routing; Simulated annealing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
Type :
conf
DOI :
10.1109/ISCAS.2002.1009847
Filename :
1009847
Link To Document :
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