Title :
A VLSI system architecture for real-time intelligent decision making
Author :
Patel, Minesh I. ; Ranganathan, Nagarajan
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
Abstract :
In this paper, we describe a VLSI system architecture for real-time intelligent decision making. The architecture integrates the adaptability of a backpropagation based neural network and the decision making ability of a rule based fuzzy expert system on a chip. The intelligent decision making system consists of a back-propagation based neural network for adaptive learning and a rule-based fuzzy expert system for decision making. Both the neural network and the expert system are realized as linear systolic arrays. Thus, the entire system can be implemented in VLSI with a few basic cells. The architecture exploits the principles of pipelining and parallelism to the maximum possible extent in order to achieve high speed and throughput. The proposed hardware can yield a real-time decision every 5ns based on a 200 MHz clock. Currently, a prototype CMOS VLSI chip implementing the proposed architecture is being built and verified
Keywords :
CMOS integrated circuits; VLSI; backpropagation; expert systems; neural nets; real-time systems; systolic arrays; CMOS VLSI chip; VLSI system architecture; adaptive learning; backpropagation based neural network; linear systolic arrays; real-time decision; real-time intelligent decision making; rule based fuzzy expert system; Adaptive systems; Backpropagation; Decision making; Expert systems; Hybrid intelligent systems; Intelligent networks; Intelligent systems; Neural networks; Real time systems; Very large scale integration;
Conference_Titel :
Application Specific Systems, Architectures and Processors, 1996. ASAP 96. Proceedings of International Conference on
Conference_Location :
Chicago, IL
Print_ISBN :
0-8186-7542-X
DOI :
10.1109/ASAP.1996.542817