DocumentCode
1731920
Title
Logic gate formed neuron type processing element
Author
Habib, M.K. ; Akel, H. ; Newcomb, R.W.
Author_Institution
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
fYear
1988
Firstpage
491
Abstract
The authors present the design of neuron-type circuit elements based on logic circuits, mainly NAND gates. Three types of subcircuits were introduced, one called the cell body with its dendritic inputs, another representing the axon base, and the final one mimicking the axon. The resulting design was an asynchronous sequential circuit. This neuron-type processing element (NTPE) computes the sum of binary weighted input pulses incorporating temporal as well as spatial summation and thresholding. This process has been accomplished by introducing a time constraint variable in the operation of the NTPE. With the availability of VLSI techniques to implement these NTPEs, full neural-type systems, including computers, can be conceived and constructed using presently available IC technology. Alternatively, they can be assembled from off-the-shelf logic circuits.<>
Keywords
VLSI; logic gates; neural nets; sequential circuits; NAND gates; asynchronous sequential circuit; axon base; binary weighted input pulses; cell body; dendritic inputs; logic circuits; neural-type systems; neuron type processing element; spatial summation; subcircuits; temporal summation; thresholding; time constraint; Biological information theory; Biological system modeling; Computer networks; Logic circuits; Logic design; Logic devices; Logic gates; Nerve fibers; Neurons; Time factors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.14971
Filename
14971
Link To Document