Implementation of the Crosspoint-Queued switch´s output controller on the NetFPGA platform

In this paper, implementation of a Crosspoint-Queued switch output controller on the NetFPGA development platform is presented. The output controller is a part of design that implements functionality of Crosspoint Queued Ethernet switch and it performs a scheduling algorithm on the crosspoint buffers. Round robin algorithm is chosen as a scheduling algorithm in this implementation. The basic principle of output controller implementation is presented here, as well as its sub-modules with detailed description of tasks that they perform. Apart from the basic scheduling function, output controller presented in this paper performs the other functions such as de-segmentation and error detection, which are needed in order to make a device fully functional in the real network environment.