• DocumentCode
    1732831
  • Title

    Reversible Full Adder/Subtractor

  • Author

    Emam, Maii T. ; Elsayed, Layle A A

  • Author_Institution
    Comput. Syst. Eng. Dept., Alexandria Univ., Alexandria, Egypt
  • fYear
    2010
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper proposes two novel designs of Adder/Subtractor using reversible logic gates. The first design is an implementation of two´s complement Adder/Subtractor suitable for signed/unsigned numbers. The other design proposes a novel reversible gate that can work singly as a reversible Full Adder/Subtractor unit. The proposed Full Adder/Subtractor is then applied to design a reversible 4-bit ripple Adder/Subtractor.
  • Keywords
    adders; logic gates; reversible full adder/subtractor; reversible logic gates; ripple adder/subtractor; signed/unsigned numbers; Adders; Barium; Computers; DNA; Logic gates; Quantum mechanics;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), 2010 XIth International Workshop on
  • Conference_Location
    Gammath
  • Print_ISBN
    978-1-4244-6816-4
  • Type

    conf

  • DOI
    10.1109/SM2ACD.2010.5672298
  • Filename
    5672298
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1732831