A through-silicon-via to active device noise coupling study for CMOS SOI technology

High speed signals on TSVs can interact with the active device area through a lossy substrate, causing circuit malfunctioning and signal integrity problems. In this paper, we examine noise coupling mechanism between TSVs and active devices with an emphasis on the CMOS SOI Technology. Both a full-wave electromagnetic solver and a 3D transmission line matrix method are applied and compared in the study. Extensive parametric simulations are performed in order to understand the tradeoffs among different design parameters. Equivalent circuit models are extracted and used in time domain analysis to assess the impact of the noise coupling on active circuit performance. The results demonstrate superior noise isolation for SOI substrates compared to bulk silicon due to the buried oxide layer capacitance.