A memory-first language and model for hardware-software cosynthesis

This paper presents a memory-centric model & language tailored for hardware/software co-synthesis. The model sets up a large potential design space where any part of the application is realizable on any software/hardware component. This is achieved by enforcing data & control locality, coupled with a unique copying semantic based on explicit knowledge of variable lifetime. The language eschews traditional array indexing for an iterator model which not only codifies access to large arrays, but also enables exploitation of concurrency while simplifying implementation in either software or hardware. A hierarchical guarded-rule language describes applications and is backed by a fully featured compiler & simulator. We demonstrate a real-world iterator-based FFT and discuss two different architectural realizations of that design.