DocumentCode :
1732987
Title :
Characterization of thermo-mechanical stress and reliability issues for Cu-filled TSVs
Author :
Malta, Dean ; Gregory, Christopher ; Lueck, Matthew ; Temple, Dorota ; Krause, Michael ; Altmann, Frank ; Petzold, Matthias ; Weatherspoon, Michael ; Miller, Joshua
Author_Institution :
RTI Int., Research Triangle Park, NC, USA
fYear :
2011
Firstpage :
1815
Lastpage :
1821
Abstract :
Successful implementation of 3D integration technology requires understanding of the unique yield and reliability issues associated with through-silicon vias (TSVs), with adequate design and process considerations to address these issues. This paper relates to the characterization of thermo-mechanical stress and reliability issues for Cu-filled TSVs designed for use in 3D Si interposers and 3D wafer-level packaging applications. The paper will describe a variety of methods for characterization of Cu TSV fill quality, microstructure, and thermally-induced TSV height increase known as “copper protrusion” or “copper pumping.” An X-ray imaging method was used for fast, nondestructive analysis of Cu TSV plating profiles and detection of trapped voids. In addition, a plasma focused ion beam (plasma-FIB) process was used to generate high quality cross sections of full TSVs, 50μm in diameter and 150μm depth. Imaging of TSVs by Ga FIB channeling contrast and electron backscattered diffraction (EBSD) provided information about Cu microstructure, including quantitative analysis of grain size. It was observed that TSVs exposed to elevated temperatures exhibited a substantial increase in grain size, which was associated with the Cu protrusion effect. This paper will also report the results of TSV integration with subsequent layers, with analysis of thermo-mechanical failures due to interactions between Cu TSVs and adjacent dielectric layers. The use of an anneal step to stabilize the plated Cu TSVs, prior to build-up of subsequent dielectric layers, will be described.
Keywords :
X-ray imaging; copper; electroplating; focused ion beam technology; integrated circuit reliability; nondestructive testing; silicon; sputter etching; stress analysis; three-dimensional integrated circuits; wafer level packaging; 3D integration technology; 3D silicon interposer; 3D wafer-level packaging; X-ray imaging method; copper TSV plating profile; copper protrusion; copper pumping; dielectric layer; electron backscattered diffraction; nondestructive analysis; plasma focused ion beam process; reliability issue; thermo-mechanical failure; thermo-mechanical stress; through-silicon vias; trapped void detection; yield issue; Annealing; Copper; Dielectrics; Grain size; Substrates; Three dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location :
Lake Buena Vista, FL
ISSN :
0569-5503
Print_ISBN :
978-1-61284-497-8
Electronic_ISBN :
0569-5503
Type :
conf
DOI :
10.1109/ECTC.2011.5898761
Filename :
5898761
Link To Document :
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