Title :
Advanced wafer thinning and handling for through silicon via technology
Author :
Lee, Jaesik ; Lee, Vincent ; Seetoh, Justin ; Thew, Serene Mei Ling ; Yeo, Yen Chen ; Li, Hong Yu ; Teo, Keng Hwa ; Gao, Shan
Author_Institution :
Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
Abstract :
This study is conducted to develop advanced wafer thinning and handling system in 50 μm thick TSV integration. Systematical investigation of the material compatibility between temporary bonding material and organic dielectric pairs is carried out in terms of temporary bonding, wafer thinning, heat treatment, and debonding. It is found that heat treatment which is representing backside dielectric curing process is critical for voids formation in the bonded wafer. The voids formation is found to be dependent on the material selected. In debonding, room temperature debonding technology is found to be a feasible solution for debonding for 3D TSV integration. Using the selected potential temporary bonding and dielectric material pairs, 3D TSV integration is successfully demonstrated.
Keywords :
curing; dielectric materials; heat treatment; thermal management (packaging); three-dimensional integrated circuits; voids (solid); wafer bonding; 3D TSV integration; backside dielectric curing process; heat treatment; material compatibility; organic dielectric pair; room temperature debonding technology; size 50 mum; temporary bonding material; through silicon via technology; voids formation; wafer bonding; wafer handling; wafer thinning; Bonding; Dielectrics; Passivation; Silicon; Thermal stability; Through-silicon vias;
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location :
Lake Buena Vista, FL
Print_ISBN :
978-1-61284-497-8
Electronic_ISBN :
0569-5503
DOI :
10.1109/ECTC.2011.5898767
