• DocumentCode
    1733399
  • Title

    Automated test development and test time reduction for RF subsystems

  • Author

    Ozev, Sule ; Orailoglu, Alex ; Haggag, Hosam

  • Author_Institution
    Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
  • Volume
    1
  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Abstract
    Increasing percentage of test cost within the overall manufacturing cost for RF sub-systems results in a need for new, low-cost, and efficient test development methods. A methodology for automating test development for RF systems is presented. Test time reduction is achieved by selecting test signal attributes that can target several parameters at once. Due to its high computational efficiency, the tool can be applied multiple times at early design stages; thus enabling parallel test and design flow.
  • Keywords
    automatic testing; design for testability; integrated circuit testing; network parameters; production testing; RF subsystems; automated test development; computational efficiency; design stages; efficient test development methods; overall manufacturing cost; parallel test/design flow; test cost; test signal attributes; test time reduction; Automatic testing; Bit error rate; Circuit simulation; Circuit testing; Costs; Linearity; Phase noise; Radio frequency; Semiconductor device testing; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
  • Print_ISBN
    0-7803-7448-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2002.1009907
  • Filename
    1009907