Thermal modeling for Silicon-on-Sapphire (SOS) based power amplifier design in wireless communication

In SOS (Silicon-On-Sapphire) based power amplifier design questions such as how the thermal performance will be after the chip being packaged, how can improvement be made through optimizing device design including the transistor layout, via, trace and I/O pads arrangement etc, are always confronted by device designers. In this paper a novel thermal modeling method has been proposed in which the micro-structures of chip and the macro-structure of package coexist in the model. The impact of device microstructure on thermal dissipation will be reflected in the final package thermal modeling result directly. It is an efficient way to assist device designers to optimize chip design for thermal performance improvement of the final package.