DocumentCode
1733817
Title
Truncated error correction for flexible approximate multiplication
Author
Sullivan, M.B. ; Swartzlander, Earl E.
Author_Institution
Sch. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA
fYear
2012
Firstpage
355
Lastpage
359
Abstract
Binary logarithms can be used to perform computer multiplication through simple addition. Exact logarithmic (and anti-logarithmic) conversion is prohibitively expensive for use in general multipliers; however, inexpensive estimate conversions can be used to perform approximate multiplication. Such approximate multipliers have been used in domain-specific applications, but existing designs either offer superior efficiency or flexibility. This study proposes a flexible approximate multiplier with improved efficiency. Preliminary analyses indicate that this design provides up to a 50% efficiency advantage relative to prior flexible approximate multipliers.
Keywords
digital arithmetic; error correction; binary logarithm; computer multiplication; flexible approximate multiplication; multiplier; truncated error correction; Truncated error correction; approximate binary logarithms; approximate multiplication; computer arithmetic;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers (ASILOMAR), 2012 Conference Record of the Forty Sixth Asilomar Conference on
Conference_Location
Pacific Grove, CA
ISSN
1058-6393
Print_ISBN
978-1-4673-5050-1
Type
conf
DOI
10.1109/ACSSC.2012.6489023
Filename
6489023
Link To Document