DocumentCode
1734207
Title
Augmenting Boundary-Scan Tests for Enhanced Defect Coverage
Author
Norrgard, Dayton ; Parker, Kenneth P.
Author_Institution
Agilent Technol., Loveland, CO
fYear
2008
Firstpage
1
Lastpage
8
Abstract
Strict analyses of boundary-scan test coverage performed on real-world printed circuit board topologies reveal significant holes in test coverage. Rather than abandon boundary-scan, it is preferable to augment boundary-scan test with other technologies that improve the overall ability to detect defects.
Keywords
boundary scan testing; network topology; printed circuit design; printed circuit testing; boundary-scan test coverage; enhanced defect coverage; printed circuit board topology; Circuit testing; Circuit topology; Connectors; Integrated circuit interconnections; Performance analysis; Performance evaluation; Pins; Printed circuits; Resistors; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700580
Filename
4700580
Link To Document