DocumentCode
1734973
Title
Evaluating the Effectiveness of Physically-Aware N-Detect Test using Real Silicon
Author
Lin, Yen-Tzu ; Poku, Osei ; Blanton, R.D. ; Nigh, Phil ; Lloyd, Peter ; Iyengar, Vikram
Author_Institution
Dept. of ECE, Carnegie Mellon Univ., Pittsburgh, PA
fYear
2008
Firstpage
1
Lastpage
9
Abstract
Physically-aware N-detect attempts to improve the detection characteristics of traditional N-detect by exploiting the localized characteristics of defects. Specifically, in addition to detecting each fault N times, we also require that the physical neighborhood surrounding the target change state as well. In this work, the effectiveness of the physically-aware metric is examined using two approaches. First, tester responses from an in-production IBM chip are analyzed to compare the physically-aware N-detect test with other traditional tests that include stuck-at, IDDQ, logic BIST, and delay tests. Second, diagnostic results from LSI chip failures are utilized to directly compare the traditional and physically-aware N-detect metrics. Results from both experiments demonstrate the effectiveness of physically-aware N-detect test in detecting defects in modern industrial designs.
Keywords
flaw detection; integrated circuit testing; large scale integration; monolithic integrated circuits; BIST; IBM chip; IDDQ test; LSI chip; delay test; logic test; physically-aware N-detect test; Application specific integrated circuits; Built-in self-test; Clocks; Costs; Delay; Fault detection; Large scale integration; Logic testing; Silicon; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700606
Filename
4700606
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