Title :
Neural networks using analog multipliers
Author :
Paulos, John J. ; Hollis, Paul W.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Abstract :
A neural network implementation using MOSFET analog multipliers to construct weighted sums is described. This scheme permits asynchronous, analog operation of Hopfield style networks with fully programmable binary weights. This approach avoids the use of large-valued resistors which waste chip area or require special processing. Using this approach, analog neurons can be constructed in as few as 2+2 K transistors per Kb connection weight. An analytical model for the analog multipliers has been derived. This model has been used to stimulate a complete neural network for the traveling salesman problem.<>
Keywords :
MOS integrated circuits; analogue circuits; multiplying circuits; neural nets; Hopfield style networks; MOSFET; analog multipliers; analog operation; analytical model; fully programmable binary weights; neural network implementation; traveling salesman problem; weighted sums; Analytical models; Hopfield neural networks; MOSFET circuits; Neural networks; Neurons; Resistors; Symmetric matrices; Traveling salesman problems; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo, Finland
DOI :
10.1109/ISCAS.1988.14973
