Ultra shallow junctions fabrication by Plasma Immersion Implantation on PULSION® followed by different annealing processes

To achieve the requirements of ITRS nodes < 45nm, beamline implantation is now limited in terms of low energies. Plasma immersion ion implantation (PIII) is thus an alternative doping technique for the formation of ultra shallow junctions for source/drain extension in silicon devices. In this study, we present some results obtained on the PIII prototype designed by the French company IBS: PULSION^reg. In previous work (7,10), Ultra shallow junctions implanted with BF3 at acceleration voltages down to 20V were shown, with implantation depths of only few nanometers. One of the main issues is then to highly activate these junctions without diffusing too much. Different annealing techniques are known to be potential solutions. Among them: SPER, laser, spike, flash and flash + spike are tested on PULSION^reg implanted samples. The effect of PAI and carbon co-implantation is also studied. The best results obtained using these different annealing technics are presented in this paper. A specific attention is given to the impact of PAI parameters on leakage current.