Title :
Direct Cell-Stability Test Techniques for an SRAM Macro with Asymmetric Cell-Bias-Voltage Modulation
Author :
Katayama, A. ; Yabe, T. ; Hirabayashi, O. ; Takeyama, Y. ; Kushida, K. ; Sasaki, T. ; Otsuka, N.
Author_Institution :
Semicond. Co., Toshiba Corp., Kawasaki
Abstract :
In this paper we propose a new metric of SRAM cell stability named static cell-flip voltage (SCFV). In order to measure SCFV, novel design-for-test (DFT) techniques with asymmetric cell-bias-voltage modulation (ACBVM) are introduced, in which the cell-data retention is measured with sweeping potential of a ground node connected to one of the cross-coupled invertors of a cell and source voltage of PMOS loads swept. It is shown that SCFV has high correlation with conventional static noise margin (SNM). The proposed techniques make it possible to directly obtain large amounts of stability data of memory cells arranged in matrix for an SRAM macro, which has been difficult with conventional SNM measurements. The measured data of 1 Kb SRAM with 65 nm technology show good correspondence with simulated results.
Keywords :
MOS memory circuits; SRAM chips; circuit stability; design for testability; integrated circuit testing; PMOS; SRAM macro; asymmetric cell-bias-voltage modulation; cell-data retention; cross-coupled invertor; design-for-test; direct cell-stability test; memory cells; static cell-flip voltage; static noise margin; Circuit testing; Design for testability; Inverters; MOSFETs; Niobium compounds; Random access memory; Semiconductor device measurement; Semiconductor device noise; Stability; Voltage;
Conference_Titel :
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-2402-3
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2008.4700616