Is there a smarter way to use 100 billion transistors?

Within the next decade it will be possible to build chip multiprocessors with thousands of cores. We can expect such devices to be exceptionally good at the kinds of problems massively parallel computers are already good at. That leaves a large class of interesting problems, especially those of artificial intelligence, for which multi-core processors are less well suited. Are there alternative architectures, scalable to 100 billion transistors and beyond, tolerant to device faults and process variations, and more appropriate for artificial intelligence problems than thousands of cores connected by a network on chip?