Title :
Boundary-Scan Testing of Power/Ground Pins
Author :
Parker, Kenneth P. ; Jacobson, Neil G.
Author_Institution :
Agilent Technol., Loveland, CO
Abstract :
Most integrated circuits today possess large numbers of power and ground pins in addition to signal pins. Boundary-scan technology will adequately test the signals, but in general does not address open defects on the power/ground pins. Some ICs could get at least partial coverage on some of these pins due to their internal power/ground distribution structure. Thus boundary-scan could be used to test, diagnose and claim coverage for these defects. What is needed is an extension to BSDL to support this capability.
Keywords :
boundary scan testing; integrated circuit testing; boundary-scan testing; ground pins; integrated circuits; internal power-ground distribution structure; least partial coverage; power pins; Circuit testing; Educational institutions; Integrated circuit modeling; Integrated circuit packaging; Integrated circuit technology; Integrated circuit testing; Jacobian matrices; Pins; Power engineering and energy; Rails;
Conference_Titel :
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-2402-3
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2008.4700628
