DocumentCode
1735712
Title
Built-in Self-Test and Fault Diagnosis for Lab-on-Chip Using Digital Microfluidic Logic Gates
Author
Zhao, Yang ; Xu, Tao ; Chakrabarty, Krishnendu
Author_Institution
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC
fYear
2008
Firstpage
1
Lastpage
10
Abstract
Dependability is an important system attribute for microfluidic lab-on-chip. Structural test and functional test are needed to detect defects and malfunctions, respectively. Previously proposed techniques for reading test outcomes and for pulse-sequence analysis are cumbersome and error-prone. We present a built-in self-test (BIST) method for digital microfluidic lab-on-chip. This method utilizes digital microfluidic logic gates to implement the BIST architecture; AND, OR and NOT gates are used to compress test-outcome droplets into one droplet signature. This approach obviates the need for capacitive sensing test-outcome circuits for analysis. An efficient diagnosis method based on a microfluidic encoder is also proposed to locate a single defective electrode in a microfluidic array. Finally, reconfiguration is used during test and diagnosis to enable BIST with low area overhead.
Keywords
bioMEMS; built-in self test; fault diagnosis; lab-on-a-chip; logic gates; microfluidics; BIST method; built-in self-test; defect detection; digital microfluidic logic gates; fault diagnosis; lab-on-chip; microfluidic encoder; pulse-sequence analysis; Built-in self-test; Circuit testing; Computer errors; Electrodes; Fault diagnosis; Immune system; Logic gates; Logic testing; Microfluidics; Transportation;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700635
Filename
4700635
Link To Document