DocumentCode
1735759
Title
Linearity Test Time Reduction for Analog-to-Digital Converters Using the Kalman Filter with Experimental Parameter Estimation
Author
Le Jin
Author_Institution
Nat. Semicond., Santa Clara, CA
fYear
2008
Firstpage
1
Lastpage
8
Abstract
This work develops appropriate system and noise models, and a corresponding form of the Kalman filter to improve linearity test accuracy for high-resolution ADCs, while all necessary parameters are obtained from experimental measurements. The proposed algorithm can achieve comparable accuracy as that of the conventional histogram algorithm, by using a much smaller number of samples. This method can significantly shorten the test time and lower the cost of ADC production.
Keywords
Kalman filters; analogue-digital conversion; circuit testing; linearisation techniques; parameter estimation; Kalman filter; analog-to-digital converters; experimental parameter estimation; linearity test accuracy; linearity test time reduction; Analog-digital conversion; Costs; Histograms; Linearity; Parameter estimation; Semiconductor device noise; Semiconductor device testing; Signal processing; System testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700637
Filename
4700637
Link To Document