DocumentCode
1736852
Title
Challenges in Scaling Software-Based Self-Testing to Multithreaded Chip Multiprocessors
Author
Gizopoulos, Dimitris
Author_Institution
Univ. of Piraeus, Piraeus
fYear
2008
Firstpage
1
Lastpage
2
Abstract
Functional software-based self-testing (SBST) has been recently studied by leading academic research groups and applied by major microprocessor manufacturers as a complement to other classic structural testing techniques for microprocessors and processor-based SoCs. Is the SBST paradigm scalable to testing multithreaded chip multiprocessors (CMPs) and effectively detect faults not only in the functional components but also in the thread-specific and core interoperability logic? We study the challenges in scaling existing software-based self-test capital (uniprocessor self-test programs and self-test generation techniques) to real, multithreaded CMPs, like Sun´s OpenSPARC T1 and T2. Since this type of CMPs is built around well studied microprocessor cores of mature architecture (like SPARC v9 in the OpenSPARC case), tailoring, enhancing and scheduling of existing uniprocessor self-test programs can be an effective methodology for software-based self-test of CMPs.
Keywords
automatic test software; microprocessor chips; multi-threading; system-on-chip; SPARC v9; Sun OpenSPARC T1; multithreaded chip multiprocessors; processor-based SoC; self-test generation techniques; software-based self-testing; structural testing techniques; uniprocessor self-test programs; Automatic testing; Built-in self-test; Fault detection; Job shop scheduling; Logic testing; Manufacturing processes; Microprocessors; Processor scheduling; Software testing; Sun;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700679
Filename
4700679
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