DocumentCode
1737180
Title
An Efficient Secure Scan Design for an SoC Embedding AES Core
Author
Song, Jaehoon ; Jung, Taejin ; Lee, Junseop ; Jeong, Hyeran ; Kim, Byeongjin ; Park, Sungju
Author_Institution
Dept. of Comput. Sci. & Eng., Hanyang Univ.
fYear
2008
Firstpage
1
Lastpage
1
Abstract
This poster presents an efficient secure scan design based on a fake key to protect a secret key from scan-based side channel attack. This technique targeted for an SoC embedding an Advanced Encryption Standard (AES) core can be adopted without requiring any modification to the functional body of the IP core, thus overheads for area, timing, and power are negligible while preserving the compatibility with the IEEE1149.1 standard.
Keywords
IEEE standards; cryptography; design for testability; system-on-chip; IEEE1149.1 standard; IP core; advanced encryption standard; design for test; secure scan design; side channel attack; Computer science; Cryptography; Design engineering; Design for testability; Hardware; Information retrieval; Power engineering and energy; Protection; Testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700693
Filename
4700693
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