DocumentCode
1737762
Title
A study on reconfigurable computing system for cryptography
Author
Yamaguchi, Teruyoshi ; Hashiyama, Tomonori ; Okuma, Shigeru
Author_Institution
Dept. of Electr. Eng., Nagoya Univ., Japan
Volume
4
fYear
2000
fDate
2000
Firstpage
2965
Abstract
This paper introduces a reconfigurable computing technique for encryption processing. Reconfigurable computing (RC) is capable of accelerating the information processing using dynamic reconfiguration of field programmable gate arrays (FPGAs). Dividing the target problems into hardware and software processing appropriately, the computation time will become much faster. A fast and flexible encryption technique is required on the Internet. An encryption technique generally consumes computational power and needs specific hardware for feasible use. Specific hardware is not capable of changing its architecture to adapt to new functionality. RC is suitable for this purpose. We implemented an RC system on an FPGA board. To examine the feasibility of this system, we apply it to encryption processing
Keywords
Internet; cryptography; field programmable gate arrays; reconfigurable architectures; FPGA; Internet; computation time; cryptography; encryption processing; field programmable gate arrays; information processing; reconfigurable computing; Acceleration; Algorithm design and analysis; Circuits; Field programmable gate arrays; Hardware; Information security; Internet; Protection; Public key; Public key cryptography;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Man, and Cybernetics, 2000 IEEE International Conference on
Conference_Location
Nashville, TN
ISSN
1062-922X
Print_ISBN
0-7803-6583-6
Type
conf
DOI
10.1109/ICSMC.2000.884451
Filename
884451
Link To Document