DocumentCode
173821
Title
Accumulator-based self-adjusting output data compression for embedded word-organized DRAMs
Author
Voyiatzis, Ioannis ; Efstathiou, C. ; Sgouropoulou, K.
Author_Institution
Dept. of Inf., Technol. Educ. of Athens, Athens, Greece
fYear
2014
fDate
6-8 May 2014
Firstpage
1
Lastpage
6
Abstract
An approach for periodic online testing of embedded DRAMs is presented. The fault-free memory contents are compressed, using accumulator-based response compaction, and periodically compared to subsequently compressed test data. The compressed signature is updated concurrently with write operations, without need for recomputing. Comparisons with previously proposed schemes indicate that the proposed scheme results in considerable savings in hardware overhead.
Keywords
DRAM chips; data compression; integrated circuit testing; accumulator-based response compaction; compressed signature; embedded word-organized DRAM; fault-free memory contents; hardware overhead; periodic online testing; self-adjusting output data compression; write operations; Compaction; Data compression; Hardware; Logic gates; Random access memory; Registers; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Technology of Integrated Systems In Nanoscale Era (DTIS), 2014 9th IEEE International Conference On
Conference_Location
Santorini
Type
conf
DOI
10.1109/DTIS.2014.6850658
Filename
6850658
Link To Document