Title :
High-speed noise robust threshold gates
Author_Institution :
RN2R/Rose Res., Dallas, TX, USA
Abstract :
This paper details a systematic method for significantly improving the noise margins of very fast threshold gates, by adding nonlinear terms determined from the Boolean form of the function to be implemented. Simulation results support our theoretical claims. Methods for reducing the power consumption are also suggested
Keywords :
Boolean functions; high-speed integrated circuits; integrated circuit noise; logic gates; threshold logic; high-speed threshold gate; noise suppression logic; nonlinear Boolean function; power consumption; Acoustic noise; Artificial intelligence; Boolean algebra; Circuits; Differential amplifiers; Energy consumption; Inverters; Logic gates; MOSFETs; Noise robustness;
Conference_Titel :
Semiconductor Conference, 2000. CAS 2000 Proceedings. International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-5885-6
DOI :
10.1109/SMICND.2000.890191
