• DocumentCode
    1739183
  • Title

    Best/worst case extraction and yield cost estimation using Monte Carlo statistical analysis

  • Author

    Belova, Nadya ; Aronowitz, Sheldon ; Dong, Jeffrey ; Puchner, Helmut

  • Author_Institution
    LSI Logic Corp., Santa Clara, CA, USA
  • Volume
    1
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    91
  • Abstract
    Methodology and simulation results from Monte Carlo sensitivity analysis based on discretization of the second-order Taylor expansion for electrical device characteristics are presented. The same dice conditions for both NMOS and PMOS were modeled. Non-degenerate distributions of electrical parameters were formed. Results of selected direct process/device simulation were mapped onto distributions obtained by the Monte Carlo analysis. The resultant distributions were used to establish yield cost associated with desired best/worst case electrical characteristics. The approach was tested for two technologies and showed excellent agreement with available experimental statistical data
  • Keywords
    CMOS integrated circuits; Monte Carlo methods; integrated circuit modelling; integrated circuit yield; sensitivity analysis; statistical analysis; Monte Carlo simulation; NMOS IC; PMOS IC; Taylor expansion; best case; discretization; electrical characteristics; parameter extraction; sensitivity analysis; statistical analysis; worst case; yield cost estimation; Analytical models; Computer aided software engineering; Costs; Electric variables; Manufacturing processes; Monte Carlo methods; Sensitivity analysis; Statistical analysis; Taylor series; Yield estimation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Conference, 2000. CAS 2000 Proceedings. International
  • Conference_Location
    Sinaia
  • Print_ISBN
    0-7803-5885-6
  • Type

    conf

  • DOI
    10.1109/SMICND.2000.890194
  • Filename
    890194