Test point insertion for compact test sets

Efficient production testing is frequently hampered because (cores in) current complex digital circuit designs require too large test sets, even with powerful ATPG tools that generate compact test sets. Built-in Self-Test approaches often suffer from fault coverage problems, due to random-resistant faults, which can be improved successfully by means of Test Point Insertion (TPI). In this paper, we evaluate the effect of TPI for BIST on the compactness of ATPG generated test sets and it turns out that most often a significant test set size reduction can be obtained. We also propose a novel TPI method, specifically aimed at facilitating compact test generation, based on the `´test counting´ technique. Experimental results indicate that the proposed method results in even larger and moreover more consistent reduction of test set sizes