DocumentCode :
1740088
Title :
Building blocks for PWM VLSI neural network
Author :
Chen, Lu ; Shi, Bingxue
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Volume :
1
fYear :
2000
fDate :
2000
Firstpage :
563
Abstract :
The existing VLSI neural network based on pulse width modulation (PWM) technique is analyzed and its new building blocks are proposed. A simple synapse multiplier with high precision and large linearity range is designed, which has no switching noise effects. To transform the neuron voltage state to a PWM signal, a voltage-pulse conversion circuit with high conversion precision and linearity is suggested. To verify the building blocks, a 2-2-1 PWM VLSI neural network is designed, its backpropagation (BP) learning algorithm is adjusted according to the circuit characteristics. The simulation result shows its ability to solve AND, OR and XOR problems. Its speed is more than 1000 times faster than software simulation
Keywords :
CMOS logic circuits; PWM power convertors; VLSI; backpropagation; neural chips; pulse circuits; AND problems; CMOS circuit; OR problem; PWM VLSI neural network; PWM signal; XOR problem; backpropagation learning algorithm; circuit characteristics; high conversion precision; high precision; large linearity range; neuron voltage state; pulse width modulation; simulation result; software simulation; synapse multiplier; voltage-pulse conversion circuit; Algorithm design and analysis; Circuit noise; Circuit simulation; Linearity; Neural networks; Neurons; Pulse width modulation; Space vector pulse width modulation; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Proceedings, 2000. WCCC-ICSP 2000. 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-5747-7
Type :
conf
DOI :
10.1109/ICOSP.2000.894554
Filename :
894554
Link To Document :
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