• DocumentCode
    1740325
  • Title

    Proven single pass design methodology for high reliable VDSM

  • Author

    Seo, Keun-Ok ; Park, Sancho

  • Author_Institution
    R&D Div., Davan Tech Co. Ltd., Seoul, South Korea
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    265
  • Lastpage
    266
  • Abstract
    This paper addresses the Avant! silicon proven single pass design methodology for the recent very deep submicron (VDSM) era. Avant!´s single pass process is a predictable and controllable design process with closure in mind, not only for timing but also for signal/power integrity. By applying the right technology to the root cause of a design problem, this process can generate an optimal result in the shortest time
  • Keywords
    integrated circuit design; integrated circuit reliability; integrated circuit technology; controllable design process; high reliability very DSM technology; power integrity; signal integrity; single pass design methodology; timing; very deep submicron technology; Circuit synthesis; Databases; Design methodology; Design optimization; Integrated circuit interconnections; Logic; Process design; Research and development; Signal design; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on
  • Conference_Location
    Cheju
  • Print_ISBN
    0-7803-6470-8
  • Type

    conf

  • DOI
    10.1109/APASIC.2000.896959
  • Filename
    896959