DocumentCode :
1742177
Title :
Performance evaluation of a partial retraining scheme for defective multi-layer neural networks
Author :
Yamamori, Kunihito ; Abe, Tom ; Horiguchi, Susumu
Author_Institution :
Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
fYear :
2001
fDate :
2001
Firstpage :
138
Lastpage :
145
Abstract :
This paper addresses an efficient stuck-defect compensation scheme for multi-layer artificial neural networks implemented in hardware devices. To compensate for stuck defects, we have proposed a two-stage partial retraining scheme that adjusts weights belonging to a neuron affected by defects based on back-propagation (BP) algorithm between two layers. For input neurons, the partial retraining scheme is applied two times; first-stage between the input layer and the hidden layer, second-stage between the hidden layer and the output layer. The partial retraining scheme does not need any additional circuits if the hardware neural network has circuits for learning. In this paper we discuss the performance of the partial retraining scheme, retraining time, network yield and generalization ability. As a result, the partial retraining scheme could compensate the neuron stuck defects about 10 times faster than the whole network retraining by BP algorithm. In addition, yields of networks are also improved. The partial retraining scheme achieved more than 80% recognition ratio for noisy input patterns when 16% neurons of the network have 0-stuck or 1-stuck defects
Keywords :
backpropagation; logic testing; neural nets; performance evaluation; backpropagation (BP) algorithm; hardware neural network; neuron stuck defects; noisy input patterns; partial retraining scheme; performance; performance evaluation; stuck-defect compensation scheme; two-stage partial retraining scheme; Artificial neural networks; Circuit faults; Equations; Information science; Multi-layer neural network; Neural network hardware; Neural networks; Neurons; Pattern recognition; Signal to noise ratio;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Systems Architecture Conference, 2001. ACSAC 2001. Proceedings. 6th Australasian
Conference_Location :
Gold Coast, Qld.
ISSN :
1530-0927
Print_ISBN :
0-7695-0954-1
Type :
conf
DOI :
10.1109/ACAC.2001.903376
Filename :
903376
Link To Document :
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