Title :
Modelling the effect of geometrical scaling on micro-electronic packaging
Author :
Hyslop, D.C. ; Müller, W.H. ; Ng, K.M.W. ; Tan, K.H. ; Albrecht, H.J.
Author_Institution :
Dept. of Mech. & Chem. Eng., Heriot-Watt Univ., Edinburgh, UK
Abstract :
The objective of this paper is to investigate if and how transformation factors for the lifetime of modern, geometrically complex microelectronic components can be defined and obtained. Three types of components are investigated: BGAs, CSPs, and flip chips (FCs). The lifetime of each is based on the prediction of lifetime for their solder bumps. The latter follows by combination of stress/strain results stemming from FE calculations in combination with a crack growth law as originally proposed by Darveaux (1995)
Keywords :
ball grid arrays; chip scale packaging; cracks; finite element analysis; flip-chip devices; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; integrated circuit reliability; soldering; stress-strain relations; BGAs; CSPs; FCs; FE calculations; crack growth law; device lifetime; flip chips; geometrical scaling; geometrically complex microelectronic components; micro-electronic packaging; modelling; solder bump lifetime prediction; stress/strain analysis; transformation factors; Chemical engineering; Chip scale packaging; Electronic packaging thermal management; Electronics industry; Electronics packaging; Geometry; Microelectronics; Solid modeling; Stress; Temperature;
Conference_Titel :
Electronic Materials and Packaging, 2000. (EMAP 2000). International Symposium on
Conference_Location :
Hong Kong
Print_ISBN :
0-7803-6654-9
DOI :
10.1109/EMAP.2000.904139
