Copper flip chip bump interconnect technology for microwave subsystems including RF characterization

In this paper, a copper bump fabrication method for flip chip attach of MMICs and passive RF/microwave structures is described. We evaluate a recent copper bump interconnect implementation for RF/microwave packaging using a prototype problem which is relevant to the mass volume mobile/WLAN market. There has been considerable interest in the development of flip chip packaging for mobile wireless consumer products. The fundamental principle of flip chip bumping here consists of using low cost copper interconnect on plated MMIC die to lead to the required MMIC substrate stand-off in order to have minimal electromagnetic interaction for the characteristics to be measured. Variables under consideration include bump height, bump diameter, and bump to bump spacing. We then compare, at a variety of operating frequencies, the theoretical circuit performance for standard and high resistivity silicon using conventional techniques in order to validate the direct problem. The determination of the MMIC power dissipation and the packaged subsystem thermal profile is not addressed here. The parasitic packaging problems arising in more conventional approaches, which follow wire bond and TAB methodologies, are replaced by an RF interconnect based on novel copper bump structures using an electroplated copper technology within micro-machined molds