DocumentCode :
1743154
Title :
Reliability of multi-layer aluminum capped copper interconnect structures
Author :
Mercado, Lei ; Radke, Robert ; Ruston, Matthew ; Tran, Tu Anh ; Williams, Bill ; Yong, Lois ; Chen, Audi ; Chen, Scott
Author_Institution :
Motorola Semicond. Products Sector, Tempe, AZ, USA
fYear :
2000
fDate :
2000
Firstpage :
84
Lastpage :
93
Abstract :
Driven for further silicon reduction, wireless applications utilize copper interconnection and increase metal layer count from three to five layers. More aggressive ESD structures placed under the bond pads offer a significant opportunity for additional die area and cost reduction. Capping copper bond pads with aluminum was selected as the primary approach for probing and wire bonding of copper devices. There is an integral relationship between probe damage on the bond pads and subsequent wire-bondability. As the pad geometry decreases, the ratio of the area of probe damage to the bond pad size becomes proportionally larger, thereby reducing the available aluminum necessary to form reliable gold-aluminum intermetallic coverage. This paper describes probe and assembly processes developed for a fine pitch three-metal layer copper interconnect device with ESD structures placed under the bond pads. The relationship between probe conditions and wire-bondability were examined. Ball shear, wire rip and corresponding failure modes were evaluated at various read points of thermal aging studies to evaluate the integrity of ball bonds to the metal stack. Reliability assessment was also performed. Based on the investigations studying the relationship between the pad structures, probe and wire bond quality, recommendations were derived to ensure high quality, stable and reliable bonds for fine pitch wire bonding on multi-layer copper interconnect devices
Keywords :
ageing; aluminium; copper; electrostatic discharge; failure analysis; fine-pitch technology; integrated circuit bonding; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; lead bonding; probes; protection; shear strength; Al-Cu; Au-Al; ESD structures; aluminum capping; assembly processes; ball bond integrity; ball shear; bond pad size; bond pads; copper bond pads; copper interconnection; die area reduction; die cost reduction; failure modes; fine pitch three-metal layer copper interconnect device; fine pitch wire bonding; metal layer count; multi-layer aluminum capped copper interconnect structures; multi-layer copper interconnect devices; pad geometry; pad structures; probe conditions; probe damage; probe damage area; probe processes; probing; reliability; reliable bonds; reliable gold-aluminum intermetallic coverage; silicon reduction; stable bonds; sub-bond pad ESD structures; thermal aging; wire bond quality; wire bonding; wire rip; wire-bondability; wireless applications; Aluminum; Bonding; Copper; Costs; Electrostatic discharge; Geometry; Intermetallic; Probes; Silicon; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2000. Twenty-Sixth IEEE/CPMT International
Conference_Location :
Santa Clara, CA
ISSN :
1089-8190
Print_ISBN :
0-7803-6482-1
Type :
conf
DOI :
10.1109/IEMT.2000.910712
Filename :
910712
Link To Document :
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