Behavioural synthesis of low power floating point CORDIC processors

Modern DSP and graphical applications require fast and efficient implementations to meet the high demands of modern systems. The CORDIC process is a powerful candidate for these systems due to its ability to perform many basic functions using the same hardware. Recent research has led to the development of a daunting number of implementation options, each with its own application restrictions and operating characteristics. This paper introduces the development of a behavioral synthesis tool designed to automate and simplify the design and use of CORDIC processors in general applications. At the present time the tool produces 576 unique versions of a CORDIC processing element in the Verilog HDL. These processing elements, or modules, can then be instantiated for use in embedded systems or System-on-a-Chip applications