DocumentCode :
1744885
Title :
Multiplierless implementation of recursive digital filters based on coefficient translation methods in low sensitivity structures
Author :
Bhattacharya, M. ; Astola, J.
Author_Institution :
Int. Center for Signal Processing, Tampere Univ. of Technol., Finland
Volume :
2
fYear :
2001
fDate :
6-9 May 2001
Firstpage :
697
Abstract :
In the coefficient translation methods for reducing sensitivity in recursive filters the modified coefficients can be realized with multipliers of shorter wordlength i.e., by fewer number of bits. When these are implemented in minimum numbers of signed powers of two (MNSPT) form, we have a multiplierless implementation. These implementations are not associated with an increase in the order of the filter that involves an increase in complexity i.e., indirect overheads
Keywords :
IIR filters; digital arithmetic; recursive filters; sensitivity; coefficient translation methods; low sensitivity structures; minimum numbers of signed powers of two form; multiplierless implementation; recursive digital filters; Band pass filters; Digital filters; Electronic mail; Lattices; Low pass filters; Noise generators; Optimization methods; Passive filters; Signal processing; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
Type :
conf
DOI :
10.1109/ISCAS.2001.921166
Filename :
921166
Link To Document :
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