DocumentCode :
1745006
Title :
An analog similarity evaluation circuit featuring variable functional forms
Author :
Yamasaki, T. ; Shibata, Tadashi
Author_Institution :
Dept. of Inf. & Commun. Eng., Tokyo Univ., Japan
Volume :
3
fYear :
2001
fDate :
6-9 May 2001
Firstpage :
561
Abstract :
An analog similarity evaluation circuit has been developed that calculates the similarity measures among vectors with real-time alterable functional forms. Besides the capability of template vector updating, the weight and the strictness of the similarity measure can be altered element by element by control signals. Experimental results from fabricated silicon demonstrate the advantages of the circuit in terms of the flexibility in evaluating similarity
Keywords :
CMOS analogue integrated circuits; analogue processing circuits; neural chips; CMOS; analog similarity evaluation circuit; control signals; flexibility; real-time alterable functional forms; strictness; template vector updating; variable functional forms; weight; Application software; CMOS technology; Circuit testing; Informatics; Inverters; Neurons; Nonvolatile memory; Real time systems; Silicon; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
Type :
conf
DOI :
10.1109/ISCAS.2001.921372
Filename :
921372
Link To Document :
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