DocumentCode
1745093
Title
A family of CMOS latches with 3 stable operating points
Author
Shou, Xiaoqiang ; Green, Michael M.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Volume
1
fYear
2001
fDate
6-9 May 2001
Firstpage
109
Abstract
A new MOSFET latch that possesses three stable operating points is presented. This circuit is the first of its kind that can be fabricated in a standard digital CMOS process with a single supply voltage and differs from a conventional CMOS latch only by the addition of 2 resistors or 2 transistors. An open loop analysis of the new circuit is introduced to examine its performance. Four variations of this circuit are presented. It is shown that this circuit lends itself well for integrated circuit realization of multi-state logic and memory
Keywords
CMOS logic circuits; circuit stability; flip-flops; logic simulation; multivalued logic circuits; CMOS latches; digital CMOS process; integrated circuit realization; multi-state logic; open loop analysis; single supply voltage; stable operating points; CMOS digital integrated circuits; CMOS logic circuits; CMOS memory circuits; CMOS process; Latches; Logic circuits; MOSFET circuits; Performance analysis; Resistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921800
Filename
921800
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