High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering

Author

U, Seng-Pan ; Martins, R.P. ; Franca, J.E.

Author_Institution

Fac. of Sci. & Technol., Macau Univ., China

Volume

1

fYear

2001

fDate

6-9 May 2001

Firstpage

204

Abstract

This paper proposes a cost-efficient multirate Switched-Capacitor structure and its realization for a high-frequency low-power sampled-data anti-imaging filter with 108 MHz output sampling rate for CCIR-601 NTSC/PAL digital video. The filter employs a 2-stage (8-tap + 6-tap) improved multirate FIR polyphase structure with double-sampling techniques to achieve the desired linear-phase filtering with 5 MHz-corner passband (<±0.25 dB ripple) and 22 MHz-corner stopband (>40 dB attenuation) as well as an embedded sampling rate increase from 27 MHz to 108 MHz. The circuit, designed with 0.35 μm CMOS technology, is expected to consume only about 28 mW for the analog part at 3.0 V supply

Keywords

CMOS analogue integrated circuits; FIR filters; VHF filters; digital video broadcasting; interpolation; low-power electronics; switched capacitor filters; video signal processing; 0.35 micron; 27 to 108 MHz; 28 mW; 3 V; CMOS technology; FIR polyphase structure; HF multirate SC realizations; NTSC/PAL digital video filtering; double-sampling techniques; high-frequency SC realizations; linear-phase filtering; low-power SC realizations; sampled-data anti-imaging filter; switched-capacitor structure; Band pass filters; Bandwidth; Capacitance; Clocks; Digital filters; Filtering; Finite impulse response filter; Passband; Sampling methods; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.921826

Filename

921826